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熊猫简历Firmware Verification Engineer简历模板，设计感、经典、左右结构风格简历模板，支持自定义板块、自定义颜色、AI润色、技能条、荣誉墙、一键更换模板，专业AI辅助一键优化Firmware Verification Engineer简历内容，仅需5分钟即可拥有一份精美的Firmware Verification Engineer简历模板，助力你获得「高薪职位」。
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Leo Panda
Firmware Verification Engineer
PROFESSIONAL SKILLS
Verification & Methodology
SystemVerilogUVMAssertions (SVA)Functional CoverageConstrained-Random Verification
Firmware & Debug
Embedded CPythonBoot Flow ValidationJTAGLog Analysis
Tools & Platforms
QuestaSimVCSXceliumVerdiGit
EDUCATION
Texas A&M University
STEMEmbedded Systems
Bachelor of Science in Computer Engineering
College Station, TXAug 2015 - May 2019
Focus on embedded systems, digital design, and computer architecture.
PROFESSIONAL SUMMARY
Firmware Verification Engineer with 5+ years of experience validating embedded and SoC firmware behavior in simulation and emulation environments. Skilled in UVM, SystemVerilog, embedded C, and debug workflows that improve coverage, reduce escaped defects, and support reliable product releases.
PROFESSIONAL EXPERIENCE
NexChip Systems
Austin, TX
SemiconductorEmbedded Systems
Senior Firmware Verification Engineer
Jul 2022 - Present
UVMSoC Verification
- Built and executed UVM-based verification environments for ARM Cortex-M firmware interfaces, increasing automated regression coverage from 78% to 96% across three product lines.
- Developed SystemVerilog assertions and functional coverage models for boot, power-management, and interrupt flows, reducing escaped pre-silicon defects by 32% in one year.
- Partnered with firmware, design, and validation teams to debug root causes using Verdi, JTAG traces, and log analysis, cutting triage turnaround from five days to two.
- Created Python regression dashboards and failure clustering scripts that prioritized high-risk tests, improving nightly pass-rate visibility and accelerating release readiness decisions for quarterly milestones.
Asterix Microdevices
San Jose, CA
SemiconductorAutomotive Electronics
Firmware Verification Engineer
Jun 2019 - Jun 2022
SystemVerilogEmbedded Firmware
- Verified SPI, I2C, UART, and secure boot firmware interactions on mixed-signal controllers, authoring reusable test sequences that shortened new IP bring-up by 30%.
- Implemented constrained-random testbenches and protocol checkers in SystemVerilog, raising block-level coverage above 95% while supporting tapeout schedules for two automotive customers.
- Investigated firmware-driven failures in emulation and simulation, correlating waveform evidence with C source behavior to eliminate recurring reset-sequence issues before customer qualification.
- Documented verification plans, traceability matrices, and bug metrics for ISO 26262-oriented programs, improving audit readiness and cross-functional status reporting during milestone reviews.
SELECTED PROJECTS
Secure Boot Firmware Verification Program
Oct 2023 - Mar 2024
Lead Verification Engineer
- Led verification of secure boot and firmware update flows for a low-power MCU platform, achieving 98% functional coverage across authentication, rollback, and recovery scenarios.
- Built reusable Python stimulus generators and scoreboard hooks that reduced test creation time by 35% and improved regression stability before silicon release.
Automated Regression Triage and Coverage Improvement
Jan 2023 - Aug 2023
Firmware Verification Engineer
- Developed a regression triage framework integrating simulator logs, waveform signatures, and failure tags, cutting duplicate bug filing by 40% across weekly verification cycles.
- Added protocol-aware checkers for interrupt latency and power-state transitions, exposing six critical corner-case defects prior to customer validation testing.
Leo Panda
Firmware Verification Engineer
PROFESSIONAL SKILLS
Verification & Methodology
SystemVerilogUVMAssertions (SVA)Functional CoverageConstrained-Random Verification
Firmware & Debug
Embedded CPythonBoot Flow ValidationJTAGLog Analysis
Tools & Platforms
QuestaSimVCSXceliumVerdiGit
EDUCATION
Texas A&M University
STEMEmbedded Systems
Bachelor of Science in Computer Engineering
College Station, TXAug 2015 - May 2019
Focus on embedded systems, digital design, and computer architecture.
PROFESSIONAL SUMMARY
Firmware Verification Engineer with 5+ years of experience validating embedded and SoC firmware behavior in simulation and emulation environments. Skilled in UVM, SystemVerilog, embedded C, and debug workflows that improve coverage, reduce escaped defects, and support reliable product releases.
PROFESSIONAL EXPERIENCE
NexChip Systems
Austin, TX
SemiconductorEmbedded Systems
Senior Firmware Verification Engineer
Jul 2022 - Present
UVMSoC Verification
- Built and executed UVM-based verification environments for ARM Cortex-M firmware interfaces, increasing automated regression coverage from 78% to 96% across three product lines.
- Developed SystemVerilog assertions and functional coverage models for boot, power-management, and interrupt flows, reducing escaped pre-silicon defects by 32% in one year.
- Partnered with firmware, design, and validation teams to debug root causes using Verdi, JTAG traces, and log analysis, cutting triage turnaround from five days to two.
- Created Python regression dashboards and failure clustering scripts that prioritized high-risk tests, improving nightly pass-rate visibility and accelerating release readiness decisions for quarterly milestones.
Asterix Microdevices
San Jose, CA
SemiconductorAutomotive Electronics
Firmware Verification Engineer
Jun 2019 - Jun 2022
SystemVerilogEmbedded Firmware
- Verified SPI, I2C, UART, and secure boot firmware interactions on mixed-signal controllers, authoring reusable test sequences that shortened new IP bring-up by 30%.
- Implemented constrained-random testbenches and protocol checkers in SystemVerilog, raising block-level coverage above 95% while supporting tapeout schedules for two automotive customers.
- Investigated firmware-driven failures in emulation and simulation, correlating waveform evidence with C source behavior to eliminate recurring reset-sequence issues before customer qualification.
- Documented verification plans, traceability matrices, and bug metrics for ISO 26262-oriented programs, improving audit readiness and cross-functional status reporting during milestone reviews.
SELECTED PROJECTS
Secure Boot Firmware Verification Program
Oct 2023 - Mar 2024
Lead Verification Engineer
- Led verification of secure boot and firmware update flows for a low-power MCU platform, achieving 98% functional coverage across authentication, rollback, and recovery scenarios.
- Built reusable Python stimulus generators and scoreboard hooks that reduced test creation time by 35% and improved regression stability before silicon release.
Automated Regression Triage and Coverage Improvement
Jan 2023 - Aug 2023
Firmware Verification Engineer
- Developed a regression triage framework integrating simulator logs, waveform signatures, and failure tags, cutting duplicate bug filing by 40% across weekly verification cycles.
- Added protocol-aware checkers for interrupt latency and power-state transitions, exposing six critical corner-case defects prior to customer validation testing.
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